Fabrication of integrated circuit (IC) devices at a modern level of miniaturization demands techniques that can operate at an atomic scale. Certain components of IC devices now have dimensions of tens of Angströms, corresponding to only a few atomic layers of material. For example, gate dielectric in modern IC transistors can have a thickness of only 12 Å, corresponding to only four atomic layers of silicon dioxide. It is often desirable to fine-tune the electronic properties of these components by altering their dimensions, which would involve deposition or removal of only a few atomic layers of material. While atomic layer deposition (ALD) and atomic-scale epitaxial growth techniques have been developed, the methods for controlled removal of one or several atomic layers are still limited.
Silicon oxides, silicon dioxide and its carbon-doped, boron-doped, and phosphorous-doped variants are important dielectric materials used in IC devices. Silicon oxides serve as an insulator in bulk dielectric layers, as a gate dielectric in transistors, and as a capacitor dielectric in memory devices, such as dynamic random-access memory (DRAM). Silicon oxide also is inadvertently formed on layers of silicon when a partially fabricated wafer is exposed to air. This type of silicon oxide, known as native oxide, forms a thin film on the layer of silicon. Native oxide film together with oxide residue produced during etching and/or ashing frequently presents a problem for further processing steps. When formed in the bottom of a silicon landed via or contact hole, native oxide and other oxides are highly undesired, since they raise the overall electrical resistance of the via after it is filled with conductive materials.
There is a wealth of literature describing gas phase etching of silicon oxides. The majority of these processes are essentially plasma processes, in which the reactant gases are introduced into a plasma source located in a process chamber to generate ionic and metastable species which react with the silicon oxide surface and form volatile etch by-products. In most of these processes the etch rate of the silicon oxide is controlled by the flow rate and composition of the reactant gases, plasma power, substrate temperature, or chamber pressure. The etch rate of the silicon oxide is nearly constant over time; as such, these types of processes are not well suited to accurately control the amount of a layer to be etched uniformly and precisely over all the exposed surface on the substrate. These processes cannot be applied for removal of defined amounts of material on an atomic scale.